The present invention relates to the field of integrated circuits and, in particular, retaining stored states in a memory device.
An essential semiconductor component is semiconductor memory, such as a random access memory (RAM). RAM allows the user to execute both read and write operations on memory cells. Typically, RAM devices are volatile, in that stored data is lost once the power source is disconnected or removed. Typical examples of RAM devices include dynamic random access memory (DRAM), synchronized dynamic random access memory (SDRAM) and static random access memory (SRAM).
In recent years, the memory capacity, i.e., the number and density of memory cells in memory devices have been increasing. Accordingly, the size of each cell (including storage capacitor size) has been shrinking, which also shortens the cell""s data holding time. Typically, a memory device receives a stabilizing request command in the conventional standardized cycle, about every 100 milliseconds. However, with increasing cell number and density, it is becoming more and more difficult to stabilize all memory cells at least once within the stabilizing cycle.
DRAMS and SDRAMs are volatile in the sense that the stored data, typically in the form of charged and discharged capacitors contained in memory cells arranged in a large array, will dissipate the charge after a relatively short period of time because of a charge""s natural tendency to distribute itself into a lower energy state. DRAM is particularly volatile in that it should be stabilized, i.e., recharged, typically every 100 milliseconds, in order to retain information stored on its memory cells.
Recently, studies have been conducted on the use of chalcogenide glasses as non-volatile memory cells in the semiconductor industry. One such non-volatile memory device, which uses chalcogenide glass non-volatile memory cells is known as a programmable conductor RAM (PCRAM). Chalcogenide glasses typically comprise selenium (Se), sulfur (S) and tellurium (Te). Two mechanisms are responsible for the operation of the chalcogenide glasses as non-volatile memory elements: (1) phase change and (2) ionic conductor dendrite formation. The phase change mechanism is the most studied and relates to the formation of a crystalline filament during application of a potential across two electrodes placed around a chalcogenide material. This crystalline filament has a lower resistance than the bulk chalcogenide material. This way, a conductive path is formed between the two electrodes which basically turns the cell into a resistor. To change the state of the cell from xe2x80x9conxe2x80x9d to xe2x80x9coffxe2x80x9d or vice-versa, a potential is again applied across the cell having a defined pulse shape, length, and amplitude, which will xe2x80x9cmeltxe2x80x9d the crystalline conductive path and render it amorphous.
The ionic conductor dendrite formation is based on the ability of a metal-doped chalcogenide glass to maintain an amorphous state over a wide range of metal dopant concentrations. Two electrodes (cathode and anode) are formed opposite to each other and on each side of the glass, which may be a chalcogenide-metal ion composition, typically a germanium-selenium (Gexe2x80x94Se) glass doped with silver (Ag), or a stable amorphous material.
When a voltage is applied to the electrodes, a conducting dendrite grows from the cathode towards the anode. When the voltage is reversed, the already formed dendrite dissolves or retracts. The growth rate of the dendrite depends upon the applied voltage and time. Although memory cells constructed with chalcogenide glasses and operated using the dendrite formation principles hold a stored value for a much longer period of time, e.g., days, than a conventional DRAM or SDRAM cell, (which rely on capacitors to store charge), it has been found that a grown dendrite may begin to decay.
There is a need for a method of stabilizing non-volatile chalcogenide memory cells, such as PCRAM cells.
The present invention relates to a PCRAM device and a method of retaining memory therein. The above and other features and advantages of the invention are achieved by programming a non-volatile memory cell comprising a metal doped glass layer by applying a first voltage across the cell and periodically stabilizing the memory cell by applying a second voltage, which is less than the first voltage across the cell.
In an exemplary embodiment a read-out voltage is used for stabilizing the cell, but the stabilizing voltage and read voltage may also be separate voltages. The voltage used for stabilizing the cell may be applied as a sweep, pulse or step voltage. The voltage used for stabilizing the cell may also be applied continuously.